synchronization is mechanism refers to the orderly execution of processes so that it can ensure that only one process executing in critical section(mutual exclusion).it is implemented in kernel mode.
note: critical section:
Here critical section refers to the memory shared by two or more processes.
ex:
Consider two processes increment and decrement. These two processes perform operations on common variable counter which is stored in memory.
We can divide the counter++ process in to few atomic operations.
register1=counter //value of counter loaded to register from memory
register1=register1+1 //value is incremented by one
counter=register1 //again updated value is stored in memory
same way counter-- can be divided as
register2=counter
register2=register2-1
counter=register2
Above three atomic in two processes must execute in order to have good result.
Let counter=9
If we execute increment and decrement processes sequentially, the result is same 9.
But if we allow to access these two processes to manipulate counter in which the atomic operations presented previously interleaved in some arbitrary order.one such interleaving is
T0: increment execute register1=counter {register1=9}
T1: increment execute register1=counter+1 {register1=10}
T2: decrement execute register2=counter {register2=9}
T3: decrement execute register2=counter-1 {register1=8}
T4: increment execute counter=register1 {register1=10}
T5: decrement execute counter=register2 {register1=8}
We come across three possible solutions after executing the sequence.
1) Above sequence will result 8.
2) If we reverse the order of execution of T4 and T5, the result is 10.
3) If two processes executer sequentially, the result is 9.
Above three possibility results in race condition.
note: critical section:
Here critical section refers to the memory shared by two or more processes.
ex:
Consider two processes increment and decrement. These two processes perform operations on common variable counter which is stored in memory.
We can divide the counter++ process in to few atomic operations.
register1=counter //value of counter loaded to register from memory
register1=register1+1 //value is incremented by one
counter=register1 //again updated value is stored in memory
same way counter-- can be divided as
register2=counter
register2=register2-1
counter=register2
Above three atomic in two processes must execute in order to have good result.
Let counter=9
If we execute increment and decrement processes sequentially, the result is same 9.
But if we allow to access these two processes to manipulate counter in which the atomic operations presented previously interleaved in some arbitrary order.one such interleaving is
T0: increment execute register1=counter {register1=9}
T1: increment execute register1=counter+1 {register1=10}
T2: decrement execute register2=counter {register2=9}
T3: decrement execute register2=counter-1 {register1=8}
T4: increment execute counter=register1 {register1=10}
T5: decrement execute counter=register2 {register1=8}
We come across three possible solutions after executing the sequence.
1) Above sequence will result 8.
2) If we reverse the order of execution of T4 and T5, the result is 10.
3) If two processes executer sequentially, the result is 9.
Above three possibility results in race condition.
To avoid race condition ,we should follow some algorithms that will result in sequential execution of each process.
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